Recently, miniaturization in a static random access memory (SRAM) has enabled a high-speed operation at the GHz level of the SRAM. However, at the same time, such miniaturization has decreased internal capacitance in a flip-flop consisting of: a load transistor formed of a P-channel MOS transistor; and a driver transistor formed of an N-channel MOS transistor. Meanwhile, miniaturization in transistors has decreased a cell stability margin in direct-current levels, and these decreases eventually lead to decrease in an operation margin for high-frequency signals of a semiconductor device (refer to Japanese Patent Application Publication No.